Two’s complement, one’s complement, sign-magnitude, bit widths, fixed-point and IEEE 754 – how machines really store signed and fractional numbers. Everything runs locally in your browser.
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Start from what you are trying to do
- Represent a negative number in binaryA negative value in two's complement at the bit width you actually need.3 steps, starting with Decimal to Signed Binary Converter
- See how a float is storedThe sign, exponent and mantissa of a floating-point value, and its bytes in memory order.3 steps, starting with IEEE 754 Floating Point Converter
- Signed Binary to Decimal ConverterDecode a binary bit pattern under all four signed conventions at once – unsigned, sign-magnitude, one’s complement and two’s complement – because the SAME bits mean different numbers under each.
- Decimal to Signed Binary ConverterEncode a signed decimal number – positive or negative – into two’s complement, one’s complement or sign-magnitude at 4 to 64 bits, with the encoding steps shown.
- Two's Complement CalculatorCompute the two’s complement of a value or pattern: invert every bit, then add one.
- One's Complement CalculatorCompute the one’s complement – simply invert every bit.
- Sign-Magnitude ConverterConvert between decimal and sign-magnitude form, where the leftmost bit is purely a sign flag and the rest is the ordinary magnitude – intuitive, but with two zeros.
- Binary Bit Width ConverterResize a binary value between 4, 8, 16, 32 and 64 bits.
- Fixed-Point Binary ConverterConvert between decimal values and fixed-point Qm.n binary, where n fraction bits give a resolution of 1/2ⁿ – the format of DSPs and FPGAs that have no floating-point unit.
- IEEE 754 Floating Point ConverterSee exactly how a decimal number is stored as an IEEE 754 float or double – sign, exponent and mantissa bits – and why 0.1 + 0.2 does not equal 0.3.
- Endianness ConverterSwap a value between big-endian and little-endian byte order.
Frequently asked questions
What is two's complement?
The near-universal way to represent negative integers: invert every bit of the positive value and add one. Its advantage is that addition and subtraction work identically for signed and unsigned values, so hardware needs one adder rather than two.
Why is there one more negative number than positive?
Because zero occupies a slot in the positive half. Eight-bit two's complement spans -128 to 127, so negating -128 overflows — a real edge case that causes crashes in code that assumes negation is always safe.
What is the difference between two's complement, one's complement and sign-magnitude?
Sign-magnitude uses one bit for the sign; one's complement inverts every bit; two's complement inverts and adds one. The first two both have a negative zero, which is the practical reason two's complement won.
Why does the same bit pattern show different values?
Because a bit pattern has no inherent sign. 11111111 is 255 unsigned and -1 in two's complement. Interpretation is imposed by the type, which is why a signed/unsigned mix-up produces such dramatic results.
What is sign extension?
Widening a signed value by copying the sign bit into the new high bits, so -1 in 8 bits becomes -1 in 32 bits rather than 255. Zero-extension instead fills with zeros, which is correct for unsigned values and wrong for signed ones.
How does overflow behave?
It wraps rather than erroring: adding one to the largest positive value gives the largest negative one. The tools show the wrapped result and flag that it happened, since silent wrapping is what makes these bugs hard to spot.
Which bit widths are supported?
8, 16, 32 and 64 bits, because the width changes the answer and picking it explicitly avoids the ambiguity that causes most of these mistakes.
The same bits mean different numbers under different sign conventions — and choosing or identifying the convention is where signed-number bugs are born. These tools encode, decode and complement across two’s complement, one’s complement and sign-magnitude, resize bit widths honestly, and expose fixed-point and IEEE-754 storage exactly.
Each page shows its arithmetic on your values, locally.
Four ways to store a minus sign
A CPU register holds only bits, so negative numbers are a convention, and computing has used four of them. Unsigned simply has no negatives. Sign-magnitude spends the top bit on a pure sign flag. One’s complement negates by inverting every bit. Two’s complement negates by inverting and adding one. The same eight bits decode differently under each convention — which is why the decoder tool in this family shows all four readings side by side for any pattern you enter.
Two’s complement won everywhere because of two properties: it has a single zero, while sign-magnitude and one’s complement both waste a pattern on “negative zero”, and it lets the same adder circuit handle signed and unsigned values unchanged. At eight bits, two’s complement spans −128 to +127, while the other two signed schemes span only −127 to +127. The remaining tools here cover the machinery around that choice: sign extension when widening values, fixed-point formats that give fractions to chips without floating-point hardware, and the IEEE 754 layout used for floats and doubles.
The boundary behaviour is where signed bugs live: in 8-bit two’s complement, adding one to +127 wraps to −128, because 01111111 plus one is 10000000. Overflow in addition is detectable by sign alone — two positive operands producing a negative result, or two negatives producing a positive, can only mean the true sum did not fit in the width.
